

MATLAB can read the simulations results using the compiledįunctions delivered by CADENCE via their Virtuoso MultiMode Simulation (MMSIM) Spectre/RF toolbox. For each simulation, a different workingĭirectory is used so that all results remain available. Implemented in order to automatically create batch commandįiles that will be read by the Open Command Environment forĪnalysis (OCEAN) interface tool. MATLAB is used as a master tool and the analog Processes prior to transistor-level simulations were Techniques using macro-models combined with optimization As anĪlternative, for Sigma-Delta modulators, top-down design Still this procedure is not mature enoughĪnd the large technology diversity limits its efficiency. Migration towards descriptive languages like Verilog-AMS or The extraction of efficient semiconductor devices models and Modulator starting from the extracted components macromodels.ĭifferent solutions have been proposed. The fourth section implies the highlevel system modeling and simulation for the complete Section the complete methodology flow is presented for aĭifferential current-to-current converter used in the SigmaDelta modulator structure. VHDL-AMS and the model extraction algorithms.

Interconnection MATLAB/SIMULINK – CADENCE – The interface previously described applied to a sixth-order CT We present in this paper the design methodology based on Techniques which can simulate fast, with comparative Situation raises the need of finding high-level modeling Optimization methods for an entire system are out of use. Times on transistor-level simulators thus automatic Still, the conception effort requires very large computation High levels of integration and low power consumption. Offered the possibility to obtain very good bit resolutions for New processes like integrating CMOS circuits with The use of well-adapted technologies along with Recent CT Sigma-Delta architectures adhered to the fastgrowing world of submicron and deep-submicron IC MATLAB interface will export the modules as SIMULINK Impedances, non-linearities) are extracted or calculated, the Gain, DC a nd AC transfer functions, input and output Once all the interesting macro-model characteristics (e.g. A MATLAB - CADENCE design environmentĬonnection was realized to automate simulations. Parametric) on the analog schematics implemented on specific Performing a complete set of analyses (DC, AC, transient, In our case, macro-models of amplification functions (opamps, Gm, transconductances, resonators) are extracted by Modulator performance, the macro-models to be used should As long as the technological limitations andĭispersion imply serious degradation of a Sigma-Delta Steps, but cannot guarantee the optimization of the transistorlevel structure. This approach is well-suited for initial design Methodology, fast simulations of a sixth-order CT Sigma-Delta Modulator in the SIMULINK object-oriented environment or Upon designer’s choice, the resulted macromodels can be used to implement and optimize a whole Implying the extraction of CADENCE schematics for analogĮlements into robust macro-models for MATLAB-SIMULINKĪnd VHDL-AMS. Present a design methodology and the resulted application tools However, the closed-loopĪrchitecture characteristics and technology requirements shouldīe strictly observed on the respective models. High-level system modeling should be considered in order to Require large computation times when using only transistor-levelĪnalog simulators like CADENCE Spectre or PSpice. Philippe BENABES, Member, IEEE, Catalin-Adrian TUGUI,ĭepartment of Signal Processing and Electronic Systemsĩ1192 GIF-SUR-YVETTE, The design, simulation and optimization of complexĬontinuous-time (CT) circuits like Sigma-Delta modulators Simulations Using MATLAB-Simulink and VHDLAMS Applied to Sigma-Delta Architectures Effective Modeling of CT Functions for Fast
